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| NIKO-SEM N-Channel Logic Level Enhancement P2504BDG Mode Field Effect Transistor ( Preliminary ) TO-252 (DPAK) Lead-Free D PRODUCT SUMMARY V(BR)DSS 40V RDS(ON) 25m[ ID 12A 1. GATE 2. DRAIN 3. SOURCE G S ABSOLUTE MAXIMUM RATINGS (TC = 25 C Unless Otherwise Noted) PARAMETERS/TEST CONDITIONS Drain-Source Voltage Gate-Source Voltage Continuous Drain Current Pulsed Drain Current 1 Power Dissipation TC = 25 C TC = 100 C Operating Junction & Storage Temperature Range Lead Temperature (1/16" from case for 10 sec.) THERMAL RESISTANCE RATINGS THERMAL RESISTANCE Junction-to-Case Junction-to-Ambient 1 2 SYMBOL VDS VGS LIMITS 40 20 12 10 UNITS V V TC = 25 C TC = 100 C ID IDM PD Tj, Tstg TL A 45 41 32 -55 to 150 275 C W SYMBOL RJc RJA TYPICAL MAXIMUM 3 75 UNITS C / W C / W Pulse width limited by maximum junction temperature. Duty cycle 1H ELECTRICAL CHARACTERISTICS (TC = 25 C, Unless Otherwise Noted) PARAMETER SYMBOL TEST CONDITIONS STATIC Drain-Source Breakdown Voltage Gate Threshold Voltage Gate-Body Leakage Zero Gate Voltage Drain Current On-State Drain Current 1 Drain-Source On-State Resistance1 V(BR)DSS VGS(th) IGSS IDSS ID(ON) RDS(ON) VGS = 0V, ID = 250A VDS = VGS, ID = 250A VDS = 0V, VGS = 20V VDS = 32V, VGS = 0V VDS = 30V, VGS = 0V, TC = 125 C VDS = 10V, VGS = 10V VGS = 4.5V, ID = 10A VGS = 10V, ID = 12A 45 35 21 45 25 40 1 2.0 3.0 250 1 10 nA A A m[ V LIMITS UNIT MIN TYP MAX 1 JAN-17-2005 NIKO-SEM N-Channel Logic Level Enhancement P2504BDG Mode Field Effect Transistor ( Preliminary ) TO-252 (DPAK) Lead-Free 18 S Forward Transconductance1 gfs VDS = 10V, ID = 12A DYNAMIC Input Capacitance Output Capacitance Reverse Transfer Capacitance Total Gate Charge 2 Ciss Coss Crss Qg Qgs Qgd 2 760 VGS = 0V, VDS = 10V, f = 1MHz 165 55 16 VDS = 0.5V (BR)DSS, VGS = 10V, ID = 12A 2.5 2.1 2.1 VDS = 20V, RL = 1[ ID 1A, VGS = 10V, RGEN = 6[ 7.2 11.6 3.5 4.2 14 21.0 7.2 nS nC pF Gate-Source Charge2 Gate-Drain Charge2 Turn-On Delay Time Rise Time 2 td(on) tr td(off) tf Turn-Off Delay Time2 Fall Time2 SOURCE-DRAIN DIODE RATINGS AND CHARACTERISTICS (TC = 25 C) Continuous Current Pulsed Current 3 Forward Voltage1 Reverse Recovery Time Reverse Recovery Charge 1 2 IS ISM VSD trr Qrr IS = IS, VGS = 0V IF = 5 A, dlF/dt = 100A / S 14.5 7.2 12 40 1.2 A V nS nC Pulse test : Pulse Width 300 sec, Duty Cycle 2H. Independent of operating temperature. 3 Pulse width limited by maximum junction temperature. REMARK: THE PRODUCT MARKED WITH "P2504BDG", DATE CODE or LOT # Orders for parts with Lead-Free plating can be placed using the PXXXXXXG parts name. 2 JAN-17-2005 NIKO-SEM N-Channel Logic Level Enhancement P2504BDG Mode Field Effect Transistor ( Preliminary ) TO-252 (DPAK) Lead-Free Body Diode Forward Voltage Variation with Source Current and Temperature 100 V GS = 0V 10 Is - Reverse Drain Current(A) T A = 125C 1 25C 0.1 -55C 0.01 0.001 0 0.2 0.4 0.6 0.8 1.0 V - Body Diode Forward Voltage(V) SD 1.2 1.4 3 JAN-17-2005 NIKO-SEM N-Channel Logic Level Enhancement P2504BDG Mode Field Effect Transistor ( Preliminary ) TO-252 (DPAK) Lead-Free 4 JAN-17-2005 NIKO-SEM N-Channel Logic Level Enhancement P2504BDG Mode Field Effect Transistor ( Preliminary ) TO-252 (DPAK) Lead-Free TO-252 (DPAK) MECHANICAL DATA mm Dimension Min. A B C D E F G 9.35 2.2 0.48 0.89 0.45 0.03 6 mm Dimension Max. 10.1 2.4 0.6 1.5 0.6 0.23 6.2 H I J K L M N 6.4 5.2 0.6 0.64 4.4 Typ. Min. Typ. 0.8 Max. 6.6 5.4 1 0.9 4.6 A B F C E H G L XXXXXXXXX NIKOS K M J I D 5 JAN-17-2005 |
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